1. Field of the Invention
The present invention relates to a voltage monitoring circuit for generating a difference between two input potentials as an output voltage.
2. Description of the Background Art
FIG. 10 is a circuit diagram showing the structure of a conventional voltage monitoring circuit 200. An input voltage V.sub.i is applied between a positive input terminal 1 and a negative input terminal 2. An output potential V.sub.o is applied to an output terminal 4. An operational amplifier 6 and resistors 5a, 5b, 5c and 5d form a differential amplifier, where the magnitude of the output potential V.sub.o can be made equal to the magnitude of the input voltage V.sub.i by making the values of all the resistances equal and making the gain of the operational amplifier 6 large enough. That is to say, the circuit 200 can monitor the voltage.
Now, assuming that the input voltage V.sub.i which is an object of monitoring changes to a desired value of a certain voltage V.phi., the description will be made. FIG. 11 is a graph which shows the change in the output potential V.sub.o when the input voltage V.sub.i makes transition from a value V.sub.iL which is lower than the desired value V.phi. to the desired value V.phi.. In the graph, the curves 61 and 62 correspond to the changes of the output potential V.sub.o when the value V.sub.iL is equal to 0 v and when it is larger than 0 v, respectively.
The output potential V.sub.o reaches the desired value V.phi. when a certain delay time has passed after a sharp change of the input voltage V.sub.i. When the input voltage V.sub.i rises from a value V.sub.oL larger than 0 v (the curve 62), the delay time W.sub.2 is almost determined by the through rate of the operational amplifier 6 included in the circuit 200. When the input voltage V.sub.i rises from 0 v (the curve 61), the time required for the activation of the operational amplifier 6 is added and the delay time W.sub.1 becomes further longer.
On the other hand, FIG. 12 is a graph showing the change of the output potential V.sub.o when the input voltage V.sub.i changes to the desired value V.phi. from a value V.sub.iH which is higher than the desired value V.phi.. The output potential V.sub.o reaches the desired value V.phi. when the delay time W.sub.3 has passed after the sharp change of the input potential V.sub.i.
These delay times are wasteful times when the change of the input voltage V.sub.i is not reflected to the output potential V.sub.o, which has a problem of deteriorating the performance as a voltage monitoring circuit. Accordingly it is desirable to shorten the delay time, but it is not easy to improve the through rate of the operational amplifier 6 while one of the causes of the delay time is the through rate of the operational amplifier included in the circuit 200.